1. Field of the Invention
The present invention relates, in general, to electronic circuitry for semiconductor devices and, more particularly, to a data input/output circuit with a data inversion function, and a semiconductor memory device having the data output/output circuit.
2. Description of the Related Art
The operating frequency of a semiconductor memory device continuously increases to improve operation speed. Moreover, in order to increase the number of data bits to be simultaneously input or output, the number of data input/output (I/O) pins (DQ) also increases. Recently, an ultra-high-speed semiconductor memory device that is operated at a frequency of 500 MHz or higher and has 32 data I/O pins (DQ), has been popularized.
In such a system, when 32 DQ pins are simultaneously operated, considerable noise is induced in output data, which is typically designated as “simultaneous switching noise” (hereinafter referred to as “SSN”). If the SSN is high, the waveform of output data is damaged, thus degrading signal integrity. In this case, it is difficult for the semiconductor memory device to satisfy the input/output performance required by a high-frequency system. In order to reduce the SSN, a semiconductor memory device adopts a data input/output circuit having a data inversion function.
In a data input/output circuit having a data inversion function, the number of toggled bits of a data group to be currently output is compared to that of a previously output data group. Depending on the number of toggled bits, data is output being inverted or non-inverted. In detail, if the number of toggled bits is higher than one half of the bits, bits belonging to the data group are output being inverted. Further, an output flag, indicating that the output data group has been inverted, is additionally output. If the number of toggled bits is equal to or lower than one half of the bits, bits belonging to the data group are output being non-inverted, and an output flag indicates that a data group has been output without being inverted.
As described above, the data input/output circuit having a data inversion function can consistently maintain the number of toggled bits at one half or below, thus decreasing switching noise of an output data group. As a result, since the signal integrity of the output data group is improved, the semiconductor memory device has better input/output performance.
FIG. 1 is a diagram showing a conventional data input/output circuit having a data inversion function, and a semiconductor memory device having the data input/output circuit. A first data input/output circuit 11 inverts a data group, input through first external data lines DQ1<1:8>, in response to a first input inversion flag IVF1, and provides the inverted data group to a first memory block 21. Further, the first data input/output circuit 11 determines whether a data group, output from the first memory block 21, has been inverted, and provides the output data group to the first external data lines DQ1<1:8>. In this case, a first output flag OVF1, indicating whether the output data group has been inverted, is output.
Similar to this, a second data input/output circuit 13 inverts a data group, input through second external data lines DQ2<1:8>, in response to a second input inversion flag IVF2, and provides the inverted data group to a second memory block 23. Further, the second data input/output circuit 13 determines whether the data group, output from the second memory block 23, has been inverted, and provides the output data group to the second external data lines DQ2<1:8>. In this case, a second output flag OVF2, indicating whether the output data group has been inverted, is output.
However, in the conventional semiconductor memory device, a correlation does not exist between the input inversion flags IVF1 and IVF2 and the output flags OVF1 and OVF2. Therefore, the conventional semiconductor memory device is problematic in that separate test devices are required to determine whether a data input/output circuit normally performs a data inversion function.